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FEXCore: Implements support for RPRES
This allows us to use reciprocal instructions which matches precision of what x86 expects rather than converting everything to float divides. Currently no hardware supports this, and even the upcoming X4/A720/A520 won't support it, but it was trivial to implement so wire it up.
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@@ -463,6 +463,7 @@ int main(int argc, char **argv, char **const envp) {
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FEATURE_FCMA = (1U << 4),
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FEATURE_CSSC = (1U << 5),
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FEATURE_AFP = (1U << 6),
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FEATURE_RPRES = (1U << 7),
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};
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uint64_t SVEWidth = 0;
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@@ -490,6 +491,9 @@ int main(int argc, char **argv, char **const envp) {
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if (TestHeaderData->EnabledHostFeatures & FEATURE_AFP) {
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HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEAFP);
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}
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if (TestHeaderData->EnabledHostFeatures & FEATURE_RPRES) {
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HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLERPRES);
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}
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// Always enable ARMv8.1 LSE atomics.
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HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::ENABLEATOMICS);
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@@ -517,6 +521,9 @@ int main(int argc, char **argv, char **const envp) {
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if (TestHeaderData->DisabledHostFeatures & FEATURE_AFP) {
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HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLEAFP);
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}
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if (TestHeaderData->DisabledHostFeatures & FEATURE_RPRES) {
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HostFeatureControl |= static_cast<uint64_t>(FEXCore::Config::HostFeatures::DISABLERPRES);
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}
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FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_HOSTFEATURES, fextl::fmt::format("{}", HostFeatureControl));
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FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_FORCESVEWIDTH, fextl::fmt::format("{}", SVEWidth));
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