diff --git a/.github/workflows/ccpp.yml b/.github/workflows/ccpp.yml
index 563e4787e..895059755 100644
--- a/.github/workflows/ccpp.yml
+++ b/.github/workflows/ccpp.yml
@@ -77,18 +77,6 @@ jobs:
       shell: bash
       run: cmake --build . --config $BUILD_TYPE --target install
 
-    - name: IR Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target ir_tests
-
-    - name: IR Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
-
     - name: gcc target tests 64
       working-directory: ${{runner.workspace}}/build
       shell: bash
diff --git a/.github/workflows/glibc_fault.yml b/.github/workflows/glibc_fault.yml
index 7b09a7670..b2c146d10 100644
--- a/.github/workflows/glibc_fault.yml
+++ b/.github/workflows/glibc_fault.yml
@@ -84,18 +84,6 @@ jobs:
       shell: bash
       run: cmake --build . --config $BUILD_TYPE --target install
 
-    - name: IR Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target ir_tests
-
-    - name: IR Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
-
     - name: gcc target tests 64
       working-directory: ${{runner.workspace}}/build
       shell: bash
diff --git a/.github/workflows/vixl_simulator.yml b/.github/workflows/vixl_simulator.yml
index d895db9af..64e94f008 100644
--- a/.github/workflows/vixl_simulator.yml
+++ b/.github/workflows/vixl_simulator.yml
@@ -100,18 +100,6 @@ jobs:
       working-directory: ${{runner.workspace}}/build
       run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_ASM128bit.log || true
 
-    - name: IR Tests
-      working-directory: ${{runner.workspace}}/build
-      shell: bash
-      # Execute the unit tests
-      run: cmake --build . --config $BUILD_TYPE --target ir_tests
-
-    - name: IR Test Results move
-      if: ${{ always() }}
-      shell: bash
-      working-directory: ${{runner.workspace}}/build
-      run: mv ${{runner.workspace}}/build/Testing/Temporary/LastTest.log ${{runner.workspace}}/build/Testing/Temporary/LastTest_IR.log || true
-
     - name: Truncate test results
       if: ${{ always() }}
       shell: bash
diff --git a/FEXCore/Source/Interface/Context/Context.h b/FEXCore/Source/Interface/Context/Context.h
index fa43a0f2c..e552e9908 100644
--- a/FEXCore/Source/Interface/Context/Context.h
+++ b/FEXCore/Source/Interface/Context/Context.h
@@ -171,7 +171,7 @@ namespace FEXCore::Context {
 
       void ConfigureAOTGen(FEXCore::Core::InternalThreadState *Thread, fextl::set<uint64_t> *ExternalBranches, uint64_t SectionMaxAddress) override;
       // returns false if a handler was already registered
-      CustomIRResult AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void *Creator = nullptr, void *Data = nullptr) override;
+      CustomIRResult AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void *Creator = nullptr, void *Data = nullptr);
 
       void AppendThunkDefinitions(fextl::vector<FEXCore::IR::ThunkDefinition> const& Definitions) override;
 
diff --git a/FEXCore/Source/Interface/Core/Core.cpp b/FEXCore/Source/Interface/Core/Core.cpp
index fa33a1394..710da21ad 100644
--- a/FEXCore/Source/Interface/Core/Core.cpp
+++ b/FEXCore/Source/Interface/Core/Core.cpp
@@ -20,6 +20,7 @@ $end_info$
 #include "Interface/Core/Dispatcher/Dispatcher.h"
 #include "Interface/Core/X86Tables/X86Tables.h"
 #include "Interface/HLE/Thunks/Thunks.h"
+#include "Interface/IR/IR.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 #include "Interface/IR/Passes.h"
 #include "Interface/IR/PassManager.h"
diff --git a/FEXCore/Source/Interface/HLE/Thunks/Thunks.cpp b/FEXCore/Source/Interface/HLE/Thunks/Thunks.cpp
index 72df41bcb..185e112d6 100644
--- a/FEXCore/Source/Interface/HLE/Thunks/Thunks.cpp
+++ b/FEXCore/Source/Interface/HLE/Thunks/Thunks.cpp
@@ -231,7 +231,7 @@ namespace FEXCore {
             LogMan::Msg::DFmt("Thunks: Adding guest trampoline from address {:#x} to guest function {:#x}",
                               args->original_callee, args->target_addr);
 
-            auto Result = Thread->CTX->AddCustomIREntrypoint(
+            auto Result = CTX->AddCustomIREntrypoint(
                     args->original_callee,
                     [CTX, GuestThunkEntrypoint = args->target_addr](uintptr_t Entrypoint, FEXCore::IR::IREmitter *emit) {
                         auto IRHeader = emit->_IRHeader(emit->Invalid(), Entrypoint, 0, 0);
diff --git a/FEXCore/Source/Interface/IR/IR.h b/FEXCore/Source/Interface/IR/IR.h
new file mode 100644
index 000000000..c92a7a433
--- /dev/null
+++ b/FEXCore/Source/Interface/IR/IR.h
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: MIT
+#pragma once
+
+#include <FEXCore/Utils/ThreadPoolAllocator.h>
+#include <FEXCore/IR/IR.h>
+
+#include <FEXCore/fextl/memory.h>
+#include <FEXCore/fextl/sstream.h>
+
+namespace FEXCore::IR {
+
+class RegisterAllocationData;
+
+class IRListView;
+class IREmitter;
+
+void Dump(fextl::stringstream *out, IRListView const* IR, IR::RegisterAllocationData *RAData);
+fextl::unique_ptr<IREmitter> Parse(FEXCore::Utils::IntrusivePooledAllocator &ThreadAllocator, fextl::stringstream &MapsStream);
+}
diff --git a/FEXCore/Source/Interface/IR/Passes/IRDumperPass.cpp b/FEXCore/Source/Interface/IR/Passes/IRDumperPass.cpp
index c51a722df..124ff4f7a 100644
--- a/FEXCore/Source/Interface/IR/Passes/IRDumperPass.cpp
+++ b/FEXCore/Source/Interface/IR/Passes/IRDumperPass.cpp
@@ -6,6 +6,7 @@ desc: Prints IR
 $end_info$
 */
 
+#include "Interface/IR/IR.h"
 #include "Interface/IR/PassManager.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
 #include "Interface/Core/OpcodeDispatcher.h"
diff --git a/FEXCore/Source/Interface/IR/Passes/IRValidation.cpp b/FEXCore/Source/Interface/IR/Passes/IRValidation.cpp
index 076c7f509..2773c51ba 100644
--- a/FEXCore/Source/Interface/IR/Passes/IRValidation.cpp
+++ b/FEXCore/Source/Interface/IR/Passes/IRValidation.cpp
@@ -6,6 +6,7 @@ desc: Sanity checking pass
 $end_info$
 */
 
+#include "Interface/IR/IR.h"
 #include "Interface/IR/PassManager.h"
 #include "Interface/IR/Passes/IRValidation.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
diff --git a/FEXCore/Source/Interface/IR/Passes/RAValidation.cpp b/FEXCore/Source/Interface/IR/Passes/RAValidation.cpp
index 84ed66589..f61bdaf24 100644
--- a/FEXCore/Source/Interface/IR/Passes/RAValidation.cpp
+++ b/FEXCore/Source/Interface/IR/Passes/RAValidation.cpp
@@ -1,4 +1,6 @@
 // SPDX-License-Identifier: MIT
+
+#include "Interface/IR/IR.h"
 #include "Interface/IR/PassManager.h"
 #include "Interface/IR/Passes/IRValidation.h"
 #include "Interface/IR/Passes/RegisterAllocationPass.h"
diff --git a/FEXCore/Source/Interface/IR/Passes/ValueDominanceValidation.cpp b/FEXCore/Source/Interface/IR/Passes/ValueDominanceValidation.cpp
index aefc29440..d7fc4709c 100644
--- a/FEXCore/Source/Interface/IR/Passes/ValueDominanceValidation.cpp
+++ b/FEXCore/Source/Interface/IR/Passes/ValueDominanceValidation.cpp
@@ -6,6 +6,7 @@ desc: Sanity Checking
 $end_info$
 */
 
+#include "Interface/IR/IR.h"
 #include "Interface/IR/PassManager.h"
 
 #include <FEXCore/IR/IR.h>
diff --git a/FEXCore/include/FEXCore/Core/Context.h b/FEXCore/include/FEXCore/Core/Context.h
index d463e1193..b2e6cdcae 100644
--- a/FEXCore/include/FEXCore/Core/Context.h
+++ b/FEXCore/include/FEXCore/Core/Context.h
@@ -232,7 +232,6 @@ namespace FEXCore::Context {
       FEX_DEFAULT_VISIBILITY virtual void MarkMemoryShared(FEXCore::Core::InternalThreadState *Thread) = 0;
 
       FEX_DEFAULT_VISIBILITY virtual void ConfigureAOTGen(FEXCore::Core::InternalThreadState *Thread, fextl::set<uint64_t> *ExternalBranches, uint64_t SectionMaxAddress) = 0;
-      FEX_DEFAULT_VISIBILITY virtual CustomIRResult AddCustomIREntrypoint(uintptr_t Entrypoint, CustomIREntrypointHandler Handler, void *Creator = nullptr, void *Data = nullptr) = 0;
 
       /**
        * @brief Allows the frontend to register its own thunk handlers independent of what is controlled in the backend.
diff --git a/FEXCore/include/FEXCore/IR/IR.h b/FEXCore/include/FEXCore/IR/IR.h
index e137b723c..294ad5ba9 100644
--- a/FEXCore/include/FEXCore/IR/IR.h
+++ b/FEXCore/include/FEXCore/IR/IR.h
@@ -660,9 +660,6 @@ public:
 class IRListView;
 class IREmitter;
 
-FEX_DEFAULT_VISIBILITY void Dump(fextl::stringstream *out, IRListView const* IR, IR::RegisterAllocationData *RAData);
-FEX_DEFAULT_VISIBILITY fextl::unique_ptr<IREmitter> Parse(FEXCore::Utils::IntrusivePooledAllocator &ThreadAllocator, fextl::stringstream &MapsStream);
-
 template<typename Type>
 inline NodeID NodeWrapperBase<Type>::ID() const {
   return NodeID(NodeOffset / sizeof(IR::OrderedNode));
diff --git a/Source/Tools/CMakeLists.txt b/Source/Tools/CMakeLists.txt
index 35e673b28..49455fc43 100644
--- a/Source/Tools/CMakeLists.txt
+++ b/Source/Tools/CMakeLists.txt
@@ -20,10 +20,6 @@ if (NOT MINGW_BUILD)
   add_subdirectory(CodeSizeValidation/)
   add_subdirectory(LinuxEmulation/)
 
-  if (BUILD_TESTS)
-    add_subdirectory(IRLoader/)
-  endif()
-
   add_subdirectory(FEXLoader/)
 endif()
 
diff --git a/Source/Tools/IRLoader/CMakeLists.txt b/Source/Tools/IRLoader/CMakeLists.txt
deleted file mode 100644
index 5556b1c23..000000000
--- a/Source/Tools/IRLoader/CMakeLists.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-list(APPEND LIBS FEXCore Common)
-
-add_executable(IRLoader
-  IRLoader.cpp
-)
-
-if (ENABLE_VIXL_SIMULATOR)
-  target_compile_definitions(IRLoader PRIVATE "-DVIXL_SIMULATOR=1")
-endif()
-
-target_include_directories(IRLoader
-  PRIVATE
-    ${CMAKE_CURRENT_SOURCE_DIR}/Source/
-    ${CMAKE_BINARY_DIR}/generated
-)
-target_link_libraries(IRLoader
-  PRIVATE
-    ${LIBS}
-    LinuxEmulation
-    CommonTools
-    ${PTHREAD_LIB}
-    fmt::fmt
-)
diff --git a/Source/Tools/IRLoader/IRLoader.cpp b/Source/Tools/IRLoader/IRLoader.cpp
deleted file mode 100644
index 4a9fbeb1a..000000000
--- a/Source/Tools/IRLoader/IRLoader.cpp
+++ /dev/null
@@ -1,229 +0,0 @@
-// SPDX-License-Identifier: MIT
-/*
-$info$
-tags: Bin|IRLoader
-desc: Used to run IR Tests
-$end_info$
-*/
-
-#include "Common/ArgumentLoader.h"
-#include "LinuxSyscalls/SignalDelegator.h"
-
-#include <FEXCore/Config/Config.h>
-#include <FEXCore/Core/CodeLoader.h>
-#include <FEXCore/Core/Context.h>
-#include <FEXCore/Core/CoreState.h>
-#include <FEXCore/Core/HostFeatures.h>
-#include <FEXCore/Utils/Allocator.h>
-#include <FEXCore/Utils/EnumUtils.h>
-#include <FEXCore/Utils/FileLoading.h>
-#include <FEXCore/Utils/LogManager.h>
-#include <FEXCore/HLE/SyscallHandler.h>
-#include <FEXCore/IR/IREmitter.h>
-#include <FEXCore/fextl/fmt.h>
-#include <FEXCore/fextl/sstream.h>
-
-#include <csetjmp>
-#include <functional>
-#include <memory>
-#include <stdint.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <vector>
-
-#include "HarnessHelpers.h"
-
-namespace FEXCore::Context {
-  class Context;
-}
-
-void MsgHandler(LogMan::DebugLevels Level, char const *Message)
-{
-  fextl::fmt::print("[{}] {}\n", LogMan::DebugLevelStr(Level), Message);
-  fflush(stdout);
-}
-
-void AssertHandler(char const *Message)
-{
-  fextl::fmt::print("[ASSERT] {}\n", Message);
-  fflush(stdout);
-}
-
-using namespace FEXCore::IR;
-class IRCodeLoader final {
-public:
-  IRCodeLoader(fextl::string const &Filename, fextl::string const &ConfigFilename) {
-    Config.Init(ConfigFilename);
-
-    fextl::string IRFile;
-    if (!FEXCore::FileLoading::LoadFile(IRFile, Filename)) {
-      LogMan::Msg::EFmt("Couldn't open IR file '{}'", Filename);
-      return;
-    }
-    fextl::stringstream IRStream(IRFile);
-    ParsedCode = FEXCore::IR::Parse(Allocator, IRStream);
-
-    if (ParsedCode) {
-      EntryRIP = 0x40000;
-
-      fextl::stringstream out;
-      auto IR = ParsedCode->ViewIR();
-      FEXCore::IR::Dump(&out, &IR, nullptr);
-      fextl::fmt::print("IR:\n{}\n@@@@@\n", out.str());
-
-      for (auto &[region, size] : Config.GetMemoryRegions()) {
-        FEXCore::Allocator::mmap(reinterpret_cast<void *>(region), size, PROT_READ | PROT_WRITE, MAP_FIXED | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
-      }
-
-      Config.LoadMemory();
-    }
-  }
-
-  bool LoadIR(FEXCore::Context::Context *CTX) const {
-    if (!ParsedCode) {
-      return false;
-    }
-
-    return !!CTX->AddCustomIREntrypoint(EntryRIP, [ParsedCodePtr = ParsedCode.get()](uintptr_t Entrypoint, FEXCore::IR::IREmitter *emit) {
-      emit->CopyData(*ParsedCodePtr);
-    });
-  }
-
-  bool CompareStates(FEXCore::Core::CPUState const *State, bool SupportsAVX) {
-    return Config.CompareStates(State, nullptr, SupportsAVX);
-  }
-
-  uint64_t GetStackPointer()
-  {
-    return reinterpret_cast<uint64_t>(FEXCore::Allocator::mmap(nullptr, STACK_SIZE, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0));
-  }
-
-  uint64_t DefaultRIP() const
-  {
-    return EntryRIP;
-  }
-
-  bool RequiresAVX() const {
-    return Config.RequiresAVX();
-  }
-
-private:
-  uint64_t EntryRIP{};
-  fextl::unique_ptr<IREmitter> ParsedCode;
-
-  FEXCore::Utils::PooledAllocatorMalloc Allocator;
-  FEX::HarnessHelper::ConfigLoader Config;
-  constexpr static uint64_t STACK_SIZE = 8 * 1024 * 1024;
-};
-
-class DummySyscallHandler: public FEXCore::HLE::SyscallHandler, public FEXCore::Allocator::FEXAllocOperators {
-  public:
-  uint64_t HandleSyscall(FEXCore::Core::CpuStateFrame *Frame, FEXCore::HLE::SyscallArguments *Args) override {
-    LOGMAN_MSG_A_FMT("Syscalls not implemented");
-    return 0;
-  }
-
-  FEXCore::HLE::SyscallABI GetSyscallABI(uint64_t Syscall) override {
-    LOGMAN_MSG_A_FMT("Syscalls not implemented");
-    return {0, false, 0 };
-  }
-
-  // These are no-ops implementations of the SyscallHandler API
-  FEXCore::HLE::AOTIRCacheEntryLookupResult LookupAOTIRCacheEntry(FEXCore::Core::InternalThreadState *Thread, uint64_t GuestAddr) override {
-    return {0, 0};
-  }
-};
-
-int main(int argc, char **argv, char **const envp)
-{
-  FEXCore::Allocator::GLIBCScopedFault GLIBFaultScope;
-  LogMan::Throw::InstallHandler(AssertHandler);
-  LogMan::Msg::InstallHandler(MsgHandler);
-
-  FEXCore::Config::Initialize();
-  FEXCore::Config::AddLayer(fextl::make_unique<FEX::ArgLoader::ArgLoader>(argc, argv));
-  FEXCore::Config::AddLayer(FEX::Config::CreateEnvironmentLayer(envp));
-  FEXCore::Config::Load();
-  // Ensure the IRLoader runs in 64-bit mode.
-  // This is to ensure that static register allocation in the JIT
-  // is configured correctly for accesses to the top 8 GPRs and 8 XMM registers.
-  FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_IS64BIT_MODE, "1");
-#ifdef VIXL_SIMULATOR
-  // If running under the vixl simulator, ensure that indirect runtime calls are enabled.
-  FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_DISABLE_VIXL_INDIRECT_RUNTIME_CALLS, "0");
-#endif
-
-  auto Args = FEX::ArgLoader::Get();
-  auto ParsedArgs = FEX::ArgLoader::GetParsedArgs();
-
-  LOGMAN_THROW_A_FMT(Args.size() > 1, "Not enough arguments");
-
-  FEXCore::Context::InitializeStaticTables();
-  auto CTX = FEXCore::Context::Context::CreateNewContext();
-
-  auto SignalDelegation = FEX::HLE::CreateSignalDelegator(CTX.get(), {});
-
-  CTX->SetSignalDelegator(SignalDelegation.get());
-  CTX->SetSyscallHandler(new DummySyscallHandler());
-
-  IRCodeLoader Loader(Args[0], Args[1]);
-
-  // Skip tests that require AVX on hosts that don't support it.
-  const bool SupportsAVX = CTX->GetHostFeatures().SupportsAVX;
-  if (!SupportsAVX && Loader.RequiresAVX()) {
-    return 0;
-  }
-
-  int Return{};
-
-  if (Loader.LoadIR(CTX.get()))
-  {
-    if (!CTX->InitCore()) {
-      return -1;
-    }
-    auto ParentThread = CTX->CreateThread(Loader.DefaultRIP(), Loader.GetStackPointer());
-
-    auto ShutdownReason = FEXCore::Context::ExitReason::EXIT_SHUTDOWN;
-
-    // There might already be an exit handler, leave it installed
-    if (!CTX->GetExitHandler())
-    {
-      CTX->SetExitHandler([&](uint64_t thread, FEXCore::Context::ExitReason reason) {
-        if (reason != FEXCore::Context::ExitReason::EXIT_DEBUG)
-        {
-          ShutdownReason = reason;
-        }
-      });
-    }
-
-    jmp_buf LongJump{};
-    int LongJumpVal{};
-
-    SignalDelegation->RegisterFrontendHostSignalHandler(SIGSEGV, [&LongJump](FEXCore::Core::InternalThreadState *Thread, int Signal, void *info, void *ucontext) {
-      longjmp(LongJump, 1);
-      return false;
-    }, true);
-
-    LongJumpVal = setjmp(LongJump);
-    if (!LongJumpVal) {
-      CTX->RunUntilExit(ParentThread);
-    }
-
-    LogMan::Msg::DFmt("Reason we left VM: {}", FEXCore::ToUnderlying(ShutdownReason));
-
-    // Just re-use compare state. It also checks against the expected values in config.
-    const bool Passed = Loader.CompareStates(&ParentThread->CurrentFrame->State, SupportsAVX);
-
-    LogMan::Msg::IFmt("Passed? {}\n", Passed ? "Yes" : "No");
-
-    Return = Passed ? 0 : -1;
-    CTX->DestroyThread(ParentThread);
-  }
-  else
-  {
-    LogMan::Msg::EFmt("Couldn't load IR");
-    Return = -1;
-  }
-
-  return Return;
-}
diff --git a/unittests/CMakeLists.txt b/unittests/CMakeLists.txt
index 9939c468d..be7cc55e1 100644
--- a/unittests/CMakeLists.txt
+++ b/unittests/CMakeLists.txt
@@ -1,6 +1,5 @@
 if (NOT MINGW_BUILD)
   add_subdirectory(APITests/)
-  add_subdirectory(IR/)
   add_subdirectory(POSIX/)
   add_subdirectory(gvisor-tests/)
   add_subdirectory(gcc-target-tests-32/)
diff --git a/unittests/IR/Basic/MemoryData.ir b/unittests/IR/Basic/MemoryData.ir
deleted file mode 100644
index 8bcb8e609..000000000
--- a/unittests/IR/Basic/MemoryData.ir
+++ /dev/null
@@ -1,23 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0xddccbbaa"
-;  },
-;  "MemoryRegions": {
-;    "0x100000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x100000": "AA BB CC DD"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %start, %end, %1
-    (%start i0) BeginBlock %2
-    %Addr i64 = Constant #0x100000
-    %Val i32 = LoadMem GPR, #8, %Addr i64, %Invalid, #8, SXTX, #1
-    (%Store i64) StoreRegister %Val i64, #0, #8, GPR, GPRFixed, #8
-    (%brk i0) Break {0.11.0.128}
-    (%end i0) EndBlock %2
-
diff --git a/unittests/IR/Basic/Sbfe.ir b/unittests/IR/Basic/Sbfe.ir
deleted file mode 100644
index 2bdc42501..000000000
--- a/unittests/IR/Basic/Sbfe.ir
+++ /dev/null
@@ -1,42 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0xffffffffffffff80",
-;    "RBX": "0xffffffffffff8080",
-;    "RCX": "0xffffffff80008080",
-;    "RDX": "0xfffffffffffffff0",
-;    "RSI": "0xfffffffffffffffc"
-;  },
-;  "MemoryRegions": {
-;    "0x1000000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x1000000": "0x0000000080008080",
-;    "0x1000008": "0x0000000000000030"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %start, %end, %1
-    (%start i0) BeginBlock %2
-    %Addr1 i64 = Constant #0x1000000
-    %Val i64 = LoadMem GPR, #8, %Addr1 i64, %Invalid, #8, SXTX, #1
-; Test aligned special cases
-    %Res1 i64 = Sbfe i64, #0x8, #0x0, %Val
-    (%Store1 i64) StoreRegister %Res1 i64, #0, #8, GPR, GPRFixed, #8
-    %Res2 i64 = Sbfe i64, #0x10, #0x0, %Val
-    (%Store2 i64) StoreRegister %Res2 i64, #0, #0x20, GPR, GPRFixed, #8
-    %Res3 i64 = Sbfe i64, #0x20, #0x0, %Val
-    (%Store3 i64) StoreRegister %Res3 i64, #0, #0x10, GPR, GPRFixed, #8
-    %Addr2 i64 = Constant #0x1000008
-; Test non special width
-    %Val2 i64 = LoadMem GPR, #8, %Addr2 i64, %Invalid, #8, SXTX, #1
-
-    %Res4 i64 = Sbfe i64, #0x6, #0x0, %Val2
-    (%Store4 i64) StoreRegister %Res4 i64, #0, #0x18, GPR, GPRFixed, #8
-; Test with + shift
-    %Res5 i64 = Sbfe i64, #0x4, #0x2, %Val2
-    (%Store5 i64) StoreRegister %Res5 i64, #0, #0x38, GPR, GPRFixed, #8
-    (%brk i0) Break {0.11.0.128}
-    (%end i0) EndBlock %2
diff --git a/unittests/IR/Basic/SetGPR.ir b/unittests/IR/Basic/SetGPR.ir
deleted file mode 100644
index bc031ca69..000000000
--- a/unittests/IR/Basic/SetGPR.ir
+++ /dev/null
@@ -1,15 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0x4142434445464748"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %6, %8, %3
-    (%6 i0) BeginBlock %2
-    %Value i64 = Constant #0x4142434445464748
-    (%Store i64) StoreRegister %Value i64, #0, #0x8, GPR, GPRFixed, #8
-    (%7 i0) Break {0.11.0.128}
-    (%8 i0) EndBlock %2
diff --git a/unittests/IR/CMakeLists.txt b/unittests/IR/CMakeLists.txt
deleted file mode 100644
index 2796488b2..000000000
--- a/unittests/IR/CMakeLists.txt
+++ /dev/null
@@ -1,78 +0,0 @@
-
-# Careful. Globbing can't see changes to the contents of files
-# Need to do a fresh clean to see changes
-file(GLOB_RECURSE IR_SOURCES CONFIGURE_DEPENDS *.ir)
-
-set(IR_DEPENDS "")
-foreach(IR_SRC ${IR_SOURCES})
-  get_filename_component(IR_NAME ${IR_SRC} NAME)
-
-  # Generate a temporary file
-  set(TMP_FILE "${CMAKE_CURRENT_BINARY_DIR}/${IR_TMP}")
-
-  set(OUTPUT_CONFIG_NAME "${IR_NAME}.config.bin")
-
-  add_custom_command(OUTPUT ${OUTPUT_CONFIG_NAME}
-    DEPENDS "${IR_SRC}"
-    DEPENDS "${CMAKE_SOURCE_DIR}/Scripts/json_ir_config_parse.py"
-    DEPENDS "${CMAKE_SOURCE_DIR}/Scripts/json_config_parse.py"
-    COMMAND "python3" ARGS "${CMAKE_SOURCE_DIR}/Scripts/json_ir_config_parse.py" "${IR_SRC}" "${CMAKE_CURRENT_BINARY_DIR}/${OUTPUT_CONFIG_NAME}")
-
-  list(APPEND IR_DEPENDS "${OUTPUT_CONFIG_NAME}")
-
-  # Since we pass in raw IR, we don't need to worry about various IR gen options
-  set(TEST_ARGS
-    "--no-silent -c irjit -n 500" "ir_jit" "jit"
-    )
-
-  set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests")
-  if (DEFINED ENV{runner_label})
-    set (RUNNER_DISABLED "${CMAKE_SOURCE_DIR}/unittests/ASM/Disabled_Tests_$ENV{runner_label}")
-  endif()
-
-  list(LENGTH TEST_ARGS ARG_COUNT)
-  math(EXPR ARG_COUNT "${ARG_COUNT}-1")
-  foreach(Index RANGE 0 ${ARG_COUNT} 3)
-    math(EXPR TEST_NAME_INDEX "${Index}+1")
-    math(EXPR TEST_TYPE_INDEX "${Index}+2")
-
-    list(GET TEST_ARGS ${Index} ARGS)
-    list(GET TEST_ARGS ${TEST_NAME_INDEX} TEST_DESC)
-    list(GET TEST_ARGS ${TEST_TYPE_INDEX} TEST_TYPE)
-
-    set(TEST_NAME "${TEST_DESC}/Test_${IR_NAME}")
-    string(REPLACE " " ";" ARGS_LIST ${ARGS})
-
-    set(TEST_NAME "${TEST_DESC}/Test_${IR_NAME}")
-    string(REPLACE " " ";" ARGS_LIST ${ARGS})
-    add_test(NAME ${TEST_NAME}
-      COMMAND "python3" "${CMAKE_SOURCE_DIR}/Scripts/testharness_runner.py"
-      "${CMAKE_SOURCE_DIR}/unittests/IR/Known_Failures"
-      "${CMAKE_SOURCE_DIR}/unittests/IR/Known_Failures_${TEST_TYPE}"
-      "${CMAKE_SOURCE_DIR}/unittests/IR/Disabled_Tests"
-      "${CMAKE_SOURCE_DIR}/unittests/IR/Disabled_Tests_${TEST_TYPE}"
-      "${RUNNER_DISABLED}"
-      "Test_${IR_NAME}"
-      "${CMAKE_BINARY_DIR}/Bin/IRLoader"
-      ${ARGS_LIST} "${IR_SRC}" "${OUTPUT_CONFIG_NAME}")
-    # This will cause the IR tests to fail if it can't find the TestHarness or IRN files
-    # Prety crap way to work around the fact that tests can't have a build dependency in a different directory
-    # Just make sure to independently run `make all` then `make test`
-    set_property(TEST ${TEST_NAME} APPEND PROPERTY DEPENDS "${CMAKE_BINARY_DIR}/Bin/IRLoader")
-    set_property(TEST ${TEST_NAME} APPEND PROPERTY DEPENDS "${IRC_SRC}")
-    set_property(TEST ${TEST_NAME} APPEND PROPERTY DEPENDS "${OUTPUT_CONFIG_NAME}")
-
-  endforeach()
-endforeach()
-
-add_custom_target(ir_files ALL
-  DEPENDS "${IR_DEPENDS}")
-
-execute_process(COMMAND "nproc" OUTPUT_VARIABLE CORES)
-string(STRIP ${CORES} CORES)
-
-add_custom_target(
-  ir_tests
-  WORKING_DIRECTORY "${CMAKE_BINARY_DIR}"
-  USES_TERMINAL
-  COMMAND "ctest" "--output-on-failure" "--timeout" "302" "-j${CORES}" "-R" "\.*.ir$$")
diff --git a/unittests/IR/Correctness/AddTruncate.ir b/unittests/IR/Correctness/AddTruncate.ir
deleted file mode 100644
index 7b48d4d25..000000000
--- a/unittests/IR/Correctness/AddTruncate.ir
+++ /dev/null
@@ -1,39 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0x00000000fffffff9",
-;    "RBX": "0xfffffffffffffff9",
-;    "RCX": "0x00000000fffffff9",
-;    "RDX": "0xfffffffffffffff9"
-;  },
-;  "MemoryRegions": {
-;    "0x1000000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x1000000": "0xaaaaaaaaaaaaaaa8",
-;    "0x1000010": "51 55 55 55 55 55 55 55"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %6, %12, %1
-    (%6 i0) BeginBlock %2
-    %AddrA i64 = Constant #0x1000000
-    %MemValueA i64 = LoadMem GPR, #8, %AddrA i64, %Invalid, #8, SXTX, #1
-    %AddrB i64 = Constant #0x1000010
-    %MemValueB i64 = LoadMem GPR, #8, %AddrB i64, %Invalid, #8, SXTX, #1
-    %ResultA i32 = Add i32, %MemValueA, %MemValueB
-    %ResultB i64 = Add i64, %MemValueA, %MemValueB
-
-    (%Store i64) StoreRegister %ResultA i64, #0, #0x8, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultB i64, #0, #0x20, GPR, GPRFixed, #8
-;  Constant optimisable version
-    %ValueC i64 = Constant #0xaaaaaaaaaaaaaaa8
-    %ValueD i64 = Constant #0x5555555555555551
-    %ResultC i32 = Add i32, %ValueC, %ValueD
-    %ResultD i64 = Add i64, %ValueC, %ValueD
-    (%Store i64) StoreRegister %ResultC i64, #0, #0x10, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultD i64, #0, #0x18, GPR, GPRFixed, #8
-    (%7 i0) Break {0.11.0.128}
-    (%12 i0) EndBlock %2
diff --git a/unittests/IR/Correctness/FPRStoreTruncate.ir b/unittests/IR/Correctness/FPRStoreTruncate.ir
deleted file mode 100644
index 91c533881..000000000
--- a/unittests/IR/Correctness/FPRStoreTruncate.ir
+++ /dev/null
@@ -1,65 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "XMM4": ["0x2726252423222120","0x0000000000000000"],
-;    "XMM5": ["0x0000000023222120","0x0000000000000000"],
-;    "XMM6": ["0x0000000000002120","0x0000000000000000"],
-;    "XMM7": ["0x0000000000000020","0x0000000000000000"]
-;  },
-;  "HostFeatures": ["AVX"],
-;  "MemoryRegions": {
-;    "0x1000000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x1000000": "20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f",
-;    "0x1000010": "11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11"
-;  }
-;}
-;%endif
-
-
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %6, %end, %begin
-    (%begin i0) BeginBlock %2
-; Clear registers
-    %AddrB i64 = Constant #0x1000010
-
-    %ClearVal i128 = LoadMem FPR, #0x10, %AddrB i64, %Invalid, #0x10, SXTX, #1
-    (%Clear1 i128) StoreRegister %ClearVal i128, #0, #0xc0, FPR, FPRFixed, #0x10
-    (%Clear2 i128) StoreRegister %ClearVal i128, #0, #0xe0, FPR, FPRFixed, #0x10
-    (%Clear3 i128) StoreRegister %ClearVal i128, #0, #0x100, FPR, FPRFixed, #0x10
-    (%Clear4 i128) StoreRegister %ClearVal i128, #0, #0x120, FPR, FPRFixed, #0x10
-
-    %AddrA i64 = Constant #0x1000000
-
-    %MemValueA i128 = LoadMem FPR, #0x10, %AddrA i64, %Invalid, #0x10, SXTX, #1
-    (%Store1 i128) StoreRegister %MemValueA i128, #0, #0xc0, FPR, FPRFixed, #0x10
-    (%Store2 i128) StoreRegister %MemValueA i128, #0, #0xe0, FPR, FPRFixed, #0x10
-    (%Store3 i128) StoreRegister %MemValueA i128, #0, #0x100, FPR, FPRFixed, #0x10
-
-; Partial insert through load+ins+store
-    %Value i128 = LoadRegister #0, #0x120, FPR, FPRFixed, #0x10
-    %MemInsertA i8v16 = VInsElement #0x10, #1, #0, #0, %Value i128, %MemValueA
-    (%Store4 i128) StoreRegister %MemInsertA i128, #0, #0x120, FPR, FPRFixed, #0x10
-
-    %Value64 i128 = LoadRegister #0, #0xc0, FPR, FPRFixed, #0x10
-    %Truncated64 i64 = VMov #8, %Value64
-
-    %Value32 i128 = LoadRegister #0, #0xe0, FPR, FPRFixed, #0x10
-    %Truncated32 i32 = VMov #4, %Value32
-
-    %Value16 i128 = LoadRegister #0, #0x100, FPR, FPRFixed, #0x10
-    %Truncated16 i16 = VMov #2, %Value16
-
-    %Value8 i128 = LoadRegister #0, #0x120, FPR, FPRFixed, #0x10
-    %Truncated8 i8 = VMov #1, %Value8
-
-    (%Store5 i128) StoreRegister %Truncated64 i128, #0, #0x140, FPR, FPRFixed, #0x10
-    (%Store6 i128) StoreRegister %Truncated32 i128, #0, #0x160, FPR, FPRFixed, #0x10
-    (%Store7 i128) StoreRegister %Truncated16 i128, #0, #0x180, FPR, FPRFixed, #0x10
-    (%Store8 i128) StoreRegister %Truncated8 i128, #0, #0x1a0, FPR, FPRFixed, #0x10
-    (%Store9 i128) StoreRegister %MemValueA i128, #0, #0x1c0, FPR, FPRFixed, #0x10
-
-    (%7 i0) Break {0.11.0.128}
-    (%end i0) EndBlock %2
diff --git a/unittests/IR/Correctness/LeftShiftTruncate.ir b/unittests/IR/Correctness/LeftShiftTruncate.ir
deleted file mode 100644
index 4bfd53ad0..000000000
--- a/unittests/IR/Correctness/LeftShiftTruncate.ir
+++ /dev/null
@@ -1,36 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0x000000000eca8642",
-;    "RBX": "0x000000010eca8642",
-;    "RCX": "0x000000000eca8642",
-;    "RDX": "0x000000010eca8642"
-;  },
-;  "MemoryRegions": {
-;    "0x1000000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x1000000": "0x87654321",
-;    "0x1000010": "51 55 55 55 55 55 55 55"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %6, %12, %1
-    (%6 i0) BeginBlock %2
-    %AddrA i64 = Constant #0x1000000
-    %MemValueA i32 = LoadMem GPR, #4, %AddrA i64, %Invalid, #4, SXTX, #1
-    %Shift i64 = Constant #0x1
-    %ResultA i32 = Lshl i32, %MemValueA, %Shift
-    %ResultB i64 = Lshl i64, %MemValueA, %Shift
-    (%Store i64) StoreRegister %ResultA i64, #0, #0x8, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultB i64, #0, #0x20, GPR, GPRFixed, #8
-;  Constant optimisable version
-    %ValueB i64 = Constant #0x87654321
-    %ResultC i32 = Lshl i32, %ValueB, %Shift
-    %ResultD i64 = Lshl i64, %ValueB, %Shift
-    (%Store i64) StoreRegister %ResultC i64, #0, #0x10, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultD i64, #0, #0x18, GPR, GPRFixed, #8
-    (%7 i0) Break {0.11.0.128}
-    (%12 i0) EndBlock %2
diff --git a/unittests/IR/Correctness/SubTruncate.ir b/unittests/IR/Correctness/SubTruncate.ir
deleted file mode 100644
index 6174025d3..000000000
--- a/unittests/IR/Correctness/SubTruncate.ir
+++ /dev/null
@@ -1,38 +0,0 @@
-;%ifdef CONFIG
-;{
-;  "RegData": {
-;    "RAX": "0x0000000055555557",
-;    "RBX": "0x5555555555555557",
-;    "RCX": "0x0000000055555557",
-;    "RDX": "0x5555555555555557"
-;  },
-;  "MemoryRegions": {
-;    "0x1000000": "4096"
-;  },
-;  "MemoryData": {
-;    "0x1000000": "0xaaaaaaaaaaaaaaa8",
-;    "0x1000010": "51 55 55 55 55 55 55 55"
-;  }
-;}
-;%endif
-
-(%1) IRHeader %2, #0, #0, #0
-  (%2) CodeBlock %6, %12, %1
-    (%Start i0) BeginBlock %2
-    %AddrA i64 = Constant #0x1000000
-    %MemValueA i64 = LoadMem GPR, #8, %AddrA i64, %Invalid, #8, SXTX, #1
-    %AddrB i64 = Constant #0x1000010
-    %MemValueB i64 = LoadMem GPR, #8, %AddrB i64, %Invalid, #8, SXTX, #1
-    %ResultA i32 = Sub i32, %MemValueA, %MemValueB
-    %ResultB i64 = Sub i64, %MemValueA, %MemValueB
-    (%Store i64) StoreRegister %ResultA i64, #0, #0x8, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultB i64, #0, #0x20, GPR, GPRFixed, #8
-;  Constant optimisable version
-    %ValueC i64 = Constant #0xaaaaaaaaaaaaaaa8
-    %ValueD i64 = Constant #0x5555555555555551
-    %ResultC i32 = Sub i32, %ValueC, %ValueD
-    %ResultD i64 = Sub i64, %ValueC, %ValueD
-    (%Store i64) StoreRegister %ResultC i64, #0, #0x10, GPR, GPRFixed, #8
-    (%Store i64) StoreRegister %ResultD i64, #0, #0x18, GPR, GPRFixed, #8
-    (%7 i0) Break {0.11.0.128}
-    (%12 i0) EndBlock %2
diff --git a/unittests/IR/Disabled_Tests b/unittests/IR/Disabled_Tests
deleted file mode 100644
index e69de29bb..000000000
diff --git a/unittests/IR/Known_Failures b/unittests/IR/Known_Failures
deleted file mode 100644
index e69de29bb..000000000