diff --git a/FEXCore/Source/Interface/Config/Config.json.in b/FEXCore/Source/Interface/Config/Config.json.in index a598459c6..1819efb95 100644 --- a/FEXCore/Source/Interface/Config/Config.json.in +++ b/FEXCore/Source/Interface/Config/Config.json.in @@ -77,7 +77,9 @@ "ENABLECRYPTO": "enablecrypto", "DISABLECRYPTO": "disablecrypto", "ENABLERPRES": "enablerpres", - "DISABLERPRES": "disablerpres" + "DISABLERPRES": "disablerpres", + "ENABLEPRESERVEALLABI": "enablepreserveallabi", + "DISABLEPRESERVEALLABI": "disablepreserveallabi" }, "Desc": [ "Allows controlling of the CPU features in the JIT.", @@ -97,7 +99,8 @@ "\t{enable,disable}flagm: Will force enable or disable flagm even if the host doesn't support it", "\t{enable,disable}flagm2: Will force enable or disable flagm2 even if the host doesn't support it", "\t{enable,disable}crypto: Will force enable or disable crypto extensions even if the host doesn't support it", - "\t{enable,disable}rpres: Will force enable or disable rpres even if the host doesn't support it" + "\t{enable,disable}rpres: Will force enable or disable rpres even if the host doesn't support it", + "\t{enable,disable}preserveallabi: Will force enable or disable preserve_all abi even if the host doesn't support it" ] }, "CPUID": { diff --git a/FEXCore/Source/Interface/Core/HostFeatures.cpp b/FEXCore/Source/Interface/Core/HostFeatures.cpp index e20b32397..e5f2dda37 100644 --- a/FEXCore/Source/Interface/Core/HostFeatures.cpp +++ b/FEXCore/Source/Interface/Core/HostFeatures.cpp @@ -91,6 +91,7 @@ static void OverrideFeatures(HostFeatures *Features) { ENABLE_DISABLE_OPTION(SupportsFlagM, FlagM, FLAGM); ENABLE_DISABLE_OPTION(SupportsFlagM2, FlagM2, FLAGM2); ENABLE_DISABLE_OPTION(SupportsRPRES, RPRES, RPRES); + ENABLE_DISABLE_OPTION(SupportsPreserveAllABI, PRESERVEALLABI, PRESERVEALLABI); GET_SINGLE_OPTION(Crypto, CRYPTO); #undef ENABLE_DISABLE_OPTION @@ -252,6 +253,7 @@ HostFeatures::HostFeatures() { SupportsFloatExceptions = true; #endif #endif + SupportsPreserveAllABI = FEXCORE_HAS_PRESERVE_ALL_ATTR; OverrideFeatures(this); } } diff --git a/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp b/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp index 69b06d30e..3c1ab9c31 100644 --- a/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp +++ b/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/InterpreterFallbacks.cpp @@ -85,7 +85,7 @@ void InterpreterOps::FillFallbackIndexPointers(uint64_t *Info) { Info[Core::OPINDEX_VPCMPISTRX] = reinterpret_cast(&FEXCore::CPU::OpHandlers::handle); } -bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInfo *Info) { +bool InterpreterOps::GetFallbackHandler(bool SupportsPreserveAllABI, IR::IROp_Header const *IROp, FallbackInfo *Info) { uint8_t OpSize = IROp->Size; switch(IROp->Op) { case IR::OP_F80CVTTO: { @@ -93,11 +93,11 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf switch (Op->SrcSize) { case 4: { - *Info = {FABI_F80_I16_F32, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTTO_4, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F80_I16_F32, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTTO_4, SupportsPreserveAllABI}; return true; } case 8: { - *Info = {FABI_F80_I16_F64, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVTTO_8, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F80_I16_F64, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVTTO_8, SupportsPreserveAllABI}; return true; } default: LogMan::Msg::DFmt("Unhandled size: {}", OpSize); @@ -107,11 +107,11 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf case IR::OP_F80CVT: { switch (OpSize) { case 4: { - *Info = {FABI_F32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVT_4, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVT_4, SupportsPreserveAllABI}; return true; } case 8: { - *Info = {FABI_F64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVT_8, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVT_8, SupportsPreserveAllABI}; return true; } default: LogMan::Msg::DFmt("Unhandled size: {}", OpSize); @@ -124,28 +124,28 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf switch (OpSize) { case 2: { if (Op->Truncate) { - *Info = {FABI_I16_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle2t, Core::OPINDEX_F80CVTINT_TRUNC2, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I16_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle2t, Core::OPINDEX_F80CVTINT_TRUNC2, SupportsPreserveAllABI}; } else { - *Info = {FABI_I16_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle2, Core::OPINDEX_F80CVTINT_2, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I16_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle2, Core::OPINDEX_F80CVTINT_2, SupportsPreserveAllABI}; } return true; } case 4: { if (Op->Truncate) { - *Info = {FABI_I32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4t, Core::OPINDEX_F80CVTINT_TRUNC4, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4t, Core::OPINDEX_F80CVTINT_TRUNC4, SupportsPreserveAllABI}; } else { - *Info = {FABI_I32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTINT_4, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I32_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTINT_4, SupportsPreserveAllABI}; } return true; } case 8: { if (Op->Truncate) { - *Info = {FABI_I64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8t, Core::OPINDEX_F80CVTINT_TRUNC8, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8t, Core::OPINDEX_F80CVTINT_TRUNC8, SupportsPreserveAllABI}; } else { - *Info = {FABI_I64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVTINT_8, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I64_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle8, Core::OPINDEX_F80CVTINT_8, SupportsPreserveAllABI}; } return true; } @@ -167,7 +167,7 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf &FEXCore::CPU::OpHandlers::handle<7>, }; - *Info = {FABI_I64_I16_F80_F80, (void*)handlers[Op->Flags], (Core::FallbackHandlerIndex)(Core::OPINDEX_F80CMP_0 + Op->Flags), FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I64_I16_F80_F80, (void*)handlers[Op->Flags], (Core::FallbackHandlerIndex)(Core::OPINDEX_F80CMP_0 + Op->Flags), SupportsPreserveAllABI}; return true; } @@ -176,11 +176,11 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf switch (Op->SrcSize) { case 2: { - *Info = {FABI_F80_I16_I16, (void*)&FEXCore::CPU::OpHandlers::handle2, Core::OPINDEX_F80CVTTOINT_2, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F80_I16_I16, (void*)&FEXCore::CPU::OpHandlers::handle2, Core::OPINDEX_F80CVTTOINT_2, SupportsPreserveAllABI}; return true; } case 4: { - *Info = {FABI_F80_I16_I32, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTTOINT_4, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_F80_I16_I32, (void*)&FEXCore::CPU::OpHandlers::handle4, Core::OPINDEX_F80CVTTOINT_4, SupportsPreserveAllABI}; return true; } default: LogMan::Msg::DFmt("Unhandled size: {}", OpSize); @@ -190,13 +190,13 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf #define COMMON_UNARY_X87_OP(OP) \ case IR::OP_F80##OP: { \ - *Info = {FABI_F80_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_F80##OP, FEXCORE_HAS_PRESERVE_ALL_ATTR}; \ + *Info = {FABI_F80_I16_F80, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_F80##OP, SupportsPreserveAllABI}; \ return true; \ } #define COMMON_BINARY_X87_OP(OP) \ case IR::OP_F80##OP: { \ - *Info = {FABI_F80_I16_F80_F80, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_F80##OP, FEXCORE_HAS_PRESERVE_ALL_ATTR}; \ + *Info = {FABI_F80_I16_F80_F80, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_F80##OP, SupportsPreserveAllABI}; \ return true; \ } @@ -244,10 +244,10 @@ bool InterpreterOps::GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInf // SSE4.2 Fallbacks case IR::OP_VPCMPESTRX: - *Info = {FABI_I32_I64_I64_I128_I128_I16, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_VPCMPESTRX, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I32_I64_I64_I128_I128_I16, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_VPCMPESTRX, SupportsPreserveAllABI}; return true; case IR::OP_VPCMPISTRX: - *Info = {FABI_I32_I128_I128_I16, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_VPCMPISTRX, FEXCORE_HAS_PRESERVE_ALL_ATTR}; + *Info = {FABI_I32_I128_I128_I16, (void*)&FEXCore::CPU::OpHandlers::handle, Core::OPINDEX_VPCMPISTRX, SupportsPreserveAllABI}; return true; default: diff --git a/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.h b/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.h index 1c48e2189..c103dd118 100644 --- a/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.h +++ b/FEXCore/Source/Interface/Core/Interpreter/InterpreterOps.h @@ -45,6 +45,6 @@ namespace FEXCore::CPU { class InterpreterOps { public: static void FillFallbackIndexPointers(uint64_t *Info); - static bool GetFallbackHandler(IR::IROp_Header const *IROp, FallbackInfo *Info); + static bool GetFallbackHandler(bool SupportsPreserveAllABI, IR::IROp_Header const *IROp, FallbackInfo *Info); }; } // namespace FEXCore::CPU diff --git a/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp b/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp index f04f46d5d..adaa1c2f9 100644 --- a/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp +++ b/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp @@ -79,7 +79,7 @@ namespace FEXCore::CPU { void Arm64JITCore::Op_Unhandled(IR::IROp_Header const *IROp, IR::NodeID Node) { FallbackInfo Info; - if (!InterpreterOps::GetFallbackHandler(IROp, &Info)) { + if (!InterpreterOps::GetFallbackHandler(CTX->HostFeatures.SupportsPreserveAllABI, IROp, &Info)) { #if defined(ASSERTIONS_ENABLED) && ASSERTIONS_ENABLED LOGMAN_MSG_A_FMT("Unhandled IR Op: {}", FEXCore::IR::GetName(IROp->Op)); #endif diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h index 064e7d771..016c4db1e 100644 --- a/FEXCore/include/FEXCore/Core/HostFeatures.h +++ b/FEXCore/include/FEXCore/Core/HostFeatures.h @@ -37,6 +37,7 @@ class HostFeatures final { bool SupportsFlagM{}; bool SupportsFlagM2{}; bool SupportsRPRES{}; + bool SupportsPreserveAllABI{}; // Float exception behaviour bool SupportsAFP{}; diff --git a/Source/Tools/CodeSizeValidation/Main.cpp b/Source/Tools/CodeSizeValidation/Main.cpp index 32616bb66..813eb1405 100644 --- a/Source/Tools/CodeSizeValidation/Main.cpp +++ b/Source/Tools/CodeSizeValidation/Main.cpp @@ -549,6 +549,9 @@ int main(int argc, char **argv, char **const envp) { HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::DISABLECRYPTO); } + // Always disable preserve_all abi. + HostFeatureControl |= static_cast(FEXCore::Config::HostFeatures::DISABLEPRESERVEALLABI); + FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_HOSTFEATURES, fextl::fmt::format("{}", HostFeatureControl)); FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_FORCESVEWIDTH, fextl::fmt::format("{}", SVEWidth));