diff --git a/FEXCore/Source/Interface/Core/CPUID.cpp b/FEXCore/Source/Interface/Core/CPUID.cpp
index c3b724060..dc9a0363a 100644
--- a/FEXCore/Source/Interface/Core/CPUID.cpp
+++ b/FEXCore/Source/Interface/Core/CPUID.cpp
@@ -754,7 +754,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_0Dh(uint32_t Leaf) const {
     // XFeatureSupportedMask[63:32]
     Res.edx = 0; // Upper 32-bits of XFeatureSupportedMask
   } else if (Leaf == 1) {
-    Res.eax = (0 << 0) | // XSAVEOPT
+    Res.eax = (1 << 0) | // XSAVEOPT
               (0 << 1) | // XSAVEC (and XRSTOR)
               (0 << 2) | // XGETBV - XGETBV with ECX=1 supported
               (0 << 3);  // XSAVES - XSAVES, XRSTORS, and IA32_XSS supported
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
index bdee4b8de..e7c0b1786 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
@@ -4682,8 +4682,7 @@ void OpDispatchBuilder::MemFenceOrXSAVEOPT(OpcodeArgs) {
     // 0xF0 is MFENCE
     _Fence(FEXCore::IR::Fence_LoadStore);
   } else {
-    LogMan::Msg::EFmt("Application tried using XSAVEOPT");
-    UnimplementedOp(Op);
+    XSaveOp(Op);
   }
 }