Revert "OpcodeDispatcher: add cache"

This reverts commit 46676ca376.
This commit is contained in:
Ryan Houdek committed 2024-07-02 20:24:57 -07:00
1 parent 78aee4d96e
commit 0d06e3e47d
7 files changed
+65 -230

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@@ -113,7 +113,7 @@ void OpDispatchBuilder::SyscallOp(OpcodeArgs) {
StoreGPRRegister(X86State::REG_RCX, RIPAfterInst, 8);
}
FlushRegisterCache();
CalculateDeferredFlags();
auto SyscallOp = _Syscall(Arguments[0], Arguments[1], Arguments[2], Arguments[3], Arguments[4], Arguments[5], Arguments[6], DefaultSyscallFlags);
if (OSABI != FEXCore::HLE::SyscallOSABI::OS_HANGOVER &&
@@ -395,7 +395,7 @@ void OpDispatchBuilder::PUSHOp(OpcodeArgs) {
// Store the new stack pointer
StoreGPRRegister(X86State::REG_RSP, NewSP);
FlushRegisterCache();
CalculateDeferredFlags();
}
void OpDispatchBuilder::PUSHREGOp(OpcodeArgs) {
@@ -408,7 +408,7 @@ void OpDispatchBuilder::PUSHREGOp(OpcodeArgs) {
auto NewSP = _Push(GPRSize, Size, Src, OldSP);
// Store the new stack pointer
StoreGPRRegister(X86State::REG_RSP, NewSP);
FlushRegisterCache();
CalculateDeferredFlags();
}
void OpDispatchBuilder::PUSHAOp(OpcodeArgs) {
@@ -458,7 +458,7 @@ void OpDispatchBuilder::PUSHAOp(OpcodeArgs) {
// Store the new stack pointer
StoreGPRRegister(X86State::REG_RSP, NewSP, 4);
FlushRegisterCache();
CalculateDeferredFlags();
}
template<uint32_t SegmentReg>
@@ -843,7 +843,7 @@ void OpDispatchBuilder::CondJUMPOp(OpcodeArgs) {
Target &= 0xFFFFFFFFU;
}
FlushRegisterCache();
CalculateDeferredFlags();
auto TrueBlock = JumpTargets.find(Target);
auto FalseBlock = JumpTargets.find(Op->PC + Op->InstSize);
@@ -3366,8 +3366,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
auto Src2 = _LoadMem(GPRClass, Size, Dest_RSI, Size);
// We'll calculate PF/AF after the loop, so use them as temporaries here.
StoreRegister(Core::CPUState::PF_AS_GREG, false, Src1);
StoreRegister(Core::CPUState::AF_AS_GREG, false, Src2);
_StoreRegister(Src1, Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize());
_StoreRegister(Src2, Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize());
Ref TailCounter = LoadGPRRegister(X86State::REG_RCX);
@@ -3406,8 +3406,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
// Make sure to start a new block after ending this one
{
// Grab the sources from the last iteration so we can set flags.
auto Src1 = LoadGPR(Core::CPUState::PF_AS_GREG);
auto Src2 = LoadGPR(Core::CPUState::AF_AS_GREG);
auto Src1 = _LoadRegister(Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize());
auto Src2 = _LoadRegister(Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize());
GenerateFlags_SUB(Op, Src2, Src1);
}
auto Jump_ = Jump();
@@ -3996,7 +3996,7 @@ void OpDispatchBuilder::BeginFunction(uint64_t RIP, const fextl::vector<FEXCore:
void OpDispatchBuilder::Finalize() {
// This usually doesn't emit any IR but in the case of hitting the block instruction limit it will
FlushRegisterCache();
CalculateDeferredFlags();
const uint8_t GPRSize = CTX->GetGPRSize();
// Node 0 is invalid node
@@ -4363,7 +4363,7 @@ Ref OpDispatchBuilder::LoadSource_WithOpSize(RegisterClassType Class, const X86T
const auto highIndex = Operand.Data.GPR.HighBits ? 1 : 0;
if (gpr >= FEXCore::X86State::REG_MM_0) {
A.Base = LoadContext(MM0Index + gpr - FEXCore::X86State::REG_MM_0);
A.Base = _LoadContext(OpSize, FPRClass, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0]));
} else if (gpr >= FEXCore::X86State::REG_XMM_0) {
const auto gprIndex = gpr - X86State::REG_XMM_0;
@@ -4400,7 +4400,7 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset
if (Size == -1) {
Size = GPRSize;
}
Ref Reg = LoadGPR(GPR);
Ref Reg = _LoadRegister(GPR, GPRClass, GPRSize);
if ((!AllowUpperGarbage && (Size != GPRSize)) || Offset != 0) {
// Extract the subregister if requested.
@@ -4414,6 +4414,10 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset
return Reg;
}
Ref OpDispatchBuilder::LoadXMMRegister(uint32_t XMM) {
return _LoadRegister(XMM, FPRClass, GetGuestVectorLength());
}
void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Size, uint8_t Offset) {
const uint8_t GPRSize = CTX->GetGPRSize();
if (Size == -1) {
@@ -4423,14 +4427,15 @@ void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Siz
Ref Reg = Src;
if (Size != GPRSize || Offset != 0) {
// Need to do an insert if not automatic size or zero offset.
Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, LoadGPRRegister(GPR), Src);
Reg = LoadGPRRegister(GPR);
Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, Reg, Src);
}
StoreRegister(GPR, false, Reg);
_StoreRegister(Reg, GPR, GPRClass, GPRSize);
}
void OpDispatchBuilder::StoreXMMRegister(uint32_t XMM, const Ref Src) {
StoreRegister(XMM, true, Src);
_StoreRegister(Src, XMM, FPRClass, GetGuestVectorLength());
}
Ref OpDispatchBuilder::LoadSource(RegisterClassType Class, const X86Tables::DecodedOp& Op, const X86Tables::DecodedOperand& Operand,
@@ -4449,8 +4454,7 @@ void OpDispatchBuilder::StoreResult_WithOpSize(FEXCore::IR::RegisterClassType Cl
const auto gpr = Operand.Data.GPR.GPR;
if (gpr >= FEXCore::X86State::REG_MM_0) {
LOGMAN_THROW_A_FMT(OpSize == 8, "full");
StoreContext(MM0Index + gpr - FEXCore::X86State::REG_MM_0, Src);
_StoreContext(OpSize, Class, Src, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0]));
} else if (gpr >= FEXCore::X86State::REG_XMM_0) {
const auto gprIndex = gpr - X86State::REG_XMM_0;
const auto VectorSize = (CTX->HostFeatures.SupportsSVE256 && CTX->HostFeatures.SupportsAVX) ? 32 : 16;
@@ -4548,8 +4552,6 @@ void OpDispatchBuilder::ResetWorkingList() {
DecodeFailure = false;
ShouldDump = false;
CurrentCodeBlock = nullptr;
RegCache.Written = 0;
RegCache.Cached = 0;
}
void OpDispatchBuilder::UnhandledOp(OpcodeArgs) {
@@ -4703,7 +4705,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) {
}
// Calculate flags early.
FlushRegisterCache();
CalculateDeferredFlags();
const uint8_t GPRSize = CTX->GetGPRSize();