Merge pull request #3097 from Sonicadvance1/disable_enhanced_tso

FEXCore: Disable Enhanced REP MOVSB if Atomic TSO is enabled

FEXCore/Source/Interface/Context/Context.h

@@ -378,6 +378,20 @@ namespace FEXCore::Context {
       UpdateAtomicTSOEmulationConfig();
     }
 
+    // Returns if Software TSO emulation is required.
+    // NOTE: This doesn't necessary return if Atomic-based TSO is currently enabled.
+    // This will still return true if on a single thread and TSO is currently disabled.
+    //
+    // This is to ensure that if early initialization checks CPU features and TSO /could/ be enabled, that
+    // we return consistent results.
+    //
+    // To check if Atomic TSO is currently enabled in the JIT, use `IsAtomicTSOEnabled` instead.
+    bool SoftwareTSORequired() const {
+      if (SupportsHardwareTSO) return false;
+
+      return Config.TSOEnabled;
+    }
+
     void EnableExitOnHLT() override { ExitOnHLT = true; }
 
     bool ExitOnHLTEnabled() const { return ExitOnHLT; }

FEXCore/Source/Interface/Core/CPUID.cpp

@@ -618,6 +618,11 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_06h(uint32_t Leaf) {
 FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) {
   FEXCore::CPUID::FunctionResults Res{};
   if (Leaf == 0) {
+    // Disable Enhanced REP MOVS when TSO is enabled.
+    // vcruntime140 memmove will use `rep movsb` in this case which completely destroys perf in Hades(appId 1145360)
+    // This is due to LRCPC performance on Cortex being abysmal.
+    const uint32_t SupportsEnhancedREPMOVS = CTX->SoftwareTSORequired() ? 0 : 1;
+
     // Number of subfunctions
     Res.eax = 0x0;
     Res.ebx =
@@ -630,7 +635,7 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) {
       (1 <<  6) | // FPU data pointer updated only on exception
       (1 <<  7) | // SMEP support
       (SupportsAVX() << 8) | // BMI2
-      (1 <<  9) | // Enhanced REP MOVSB/STOSB
+      (SupportsEnhancedREPMOVS << 9) | // Enhanced REP MOVSB/STOSB
       (1 << 10) | // INVPCID for system software control of process-context
       (0 << 11) | // Restricted transactional memory
       (0 << 12) | // Intel resource directory technology Monitoring